In this phase we will add the Memory Management layer to our toy OS. We will implement demand-paging. Set page size to 8 words, therefore there are 32 frames in our 256 word memory. Each entry in page table consists of the frame number, the valid/invalid-bit, and the modify-bit. We will use two page replacement algorithms, FIFO and LRU. When a page-fault occurs, the offending process is placed in the wait queue with the trap completion time set to 27 clock ticks later–same as I/O operations. After a page fault is serviced, that is 27 or more clock ticks have passed, the process is moved to ready queue. Once a page-fault occurs, you may load the new page into memory immediately. This way when page-fault has been serviced (its time is reached or has passed) the page is already in memory. All requirements of this assignment is in this website:http://cse.csusb.edu/kay/cse460/phase3.html All OS we already have:http://cse.csusb.edu/kay/cse460/phase2_sol/
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